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single igbt gate driver the mc33153 is specifically designed as an igbt driver for high power applications that include ac induction motor control, brushless dc motor control and uninterruptable power supplies. although designed for driving discrete and module igbts, this device offers a cost effective solution for driving power mosfets and bipolar transistors. device protection features include the choice of desaturation or overcurrent sensing and undervoltage detection. these devices are available in dualinline and surface mount packages and include the following features: ? high current output stage: 1.0 a source/2.0 a sink ? protection circuits for both conventional and sense igbts ? programmable fault blanking time ? protection against overcurrent and short circuit ? undervoltage lockout optimized for igbt's ? negative gate drive capability ? cost effectively drives power mosfets and bipolar transistors representative block diagram this device contains 133 active transistors. short circuit latch overcurrent latch fault output s q r current sense input kelvin gnd fault blanking/ desaturation input drive output short circuit comparator overcurrent comparator fault blanking/ desaturation comparator under voltage lockout input v ee v cc v cc v cc v ee v ee v cc v ee v cc v ee v cc v ee v cc s q r v cc v cc 6 7 4 5 3 8 2 1 130 mv 65 mv 270 m a 6.5 v output stage 12 v/ 11 v 100 k on semiconductor ? semiconductor components industries, llc, 2001 april, 2001 rev. 3 1 publication order number: mc33153/d device operating temperature range package mc33153 semiconductor technical data single igbt gate driver ordering information mc33153d mc33153p t a = 40 to +105 c so8 dip8 d suffix plastic package case 751 (so8) 8 1 18 7 6 5 2 3 4 (top view) current sense input kelvin gnd v ee input fault blanking/ desaturation input drive output pin connections p suffix plastic package case 626 fault output v cc 8 1
mc33153 http://onsemi.com 2 maximum ratings rating symbol value unit power supply voltage v v cc to v ee v cc v ee 20 kelvin ground to v ee (note 1) kgnd v ee 20 logic input v in v ee 0.3 to v cc v current sense input v s 0.3 to v cc v blanking/desaturation input v bd 0.3 to v cc v gate drive output source current sink current diode clamp current i o 1.0 2.0 1.0 a fault output source current sink current i fo 25 10 ma power dissipation and thermal characteristics d suffix so8 package, case 751 maximum power dissipation @ t a = 50 c thermal resistance, junctiontoair p suffix dip8 package, case 626 maximum power dissipation @ t a = 50 c thermal resistance, junctiontoair p d r q ja p d r q ja 0.56 180 1.0 100 w c/w w c/w operating junction temperature t j +150 c operating ambient temperature t a 40 to +105 c storage temperature range t stg 65 to +150 c note: esd data available upon request. electrical characteristics (v cc = 15 v, v ee = 0 v, kelvin gnd connected to v ee . for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 2), unless otherwise noted.) characteristic symbol min typ max unit logic input input threshold voltage high state (logic 1) low state (logic 0) v ih v il 1.2 2.70 2.30 3.2 v input current high state (v ih = 3.0 v) low state (v il = 1.2 v) i ih i il 130 50 500 100 m a drive output output voltage low state (i sink = 1.0 a) high state (i source = 500 ma) v ol v oh 12 2.0 13.9 2.5 v output pulldown resistor r pd 100 200 k w fault output output voltage low state (i sink = 5.0 ma) high state (i source = 20 ma) v fl v fh 12 0.2 13.3 1.0 v switching characteristics propagation delay (50% input to 50% output c l = 1.0 nf) logic input to drive output rise logic input to drive output fall t plh(in/out) t phl (in/out) 80 120 300 300 ns drive output rise time (10% to 90%) c l = 1.0 nf t r 17 55 ns drive output fall time (90% to 10%) c l = 1.0 nf t f 17 55 ns notes: 1. kelvin ground must always be between v ee and v cc . 2. low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible. t low = 40 c for mc33153 t high = +105 c for mc33153
mc33153 http://onsemi.com 3 electrical characteristics (continued) (v cc = 15 v, v ee = 0 v, kelvin gnd connected to v ee . for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 2), unless otherwise noted.) characteristic unit max typ min symbol switching characteristics (continued) propagation delay m s current sense input to drive output t p(oc) 0.3 1.0 fault blanking/desaturation input to drive output t p(flt) 0.3 1.0 uvlo startup voltage v cc start 11.3 12 12.6 v disable voltage v cc dis 10.4 11 11.7 v comparators overcurrent threshold voltage (v pin8 > 7.0 v) v soc 50 65 80 mv short circuit threshold voltage (v pin8 > 7.0 v) v ssc 100 130 160 mv fault blanking/desaturation threshold (v pin1 > 100 mv) v th(flt) 6.0 6.5 7.0 v current sense input current (v si = 0 v) i si 1.4 10 m a fault blanking/desaturation input current source (v pin8 = 0 v, v pin4 = 0 v) i chg 200 270 300 m a discharge current (v pin8 = 15 v, v pin4 = 5.0 v) i dschg 1.0 2.5 ma total device power supply current standby (v pin 4 = v cc , output open) operating (c l = 1.0 nf, f = 20 khz) i cc 7.2 7.9 14 20 ma notes: 1. kelvin ground must always be between v ee and v cc . 2. low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible. t low = 40 c for mc33153 t high = +105 c for mc33153 0 16 0 1.5 v o , output voltage (v) v in , input voltage (v) i in , input current (ma) figure 1. input current versus input voltage v in , input voltage (v) figure 2. output voltage versus input voltage v cc = 15 v t a = 25 c v cc = 15 v t a = 25 c 1.0 0.5 0 2.0 4.0 6.0 8.0 10 12 14 16 14 12 10 8.0 6.0 4.0 2.0 0 1.0 2.0 3.0 4.0 5.0
mc33153 http://onsemi.com 4 v oh , drive output high state voltage (v) v oh , drive output high state voltage (v) 0 15.0 0 2.0 12 2.8 -60 14.0 -60 2.5 -60 3.2 i source , output source current (a) v cc = 15 v t a = 25 c i sink , output sink current (a) t a = 25 c v cc = 15 v v cc , supply voltage (v) t a , ambient temperature ( c) v cc = 15 v i source = 500 ma v ol , output low state voltage (v) t a , ambient temperature ( c) i sink = 1.0 a figure 3. input threshold voltage versus temperature t a , ambient temperature ( c) figure 4. input threshold voltage versus supply voltage figure 5. drive output low state voltage versus temperature figure 6. drive output low state voltage versus sink current figure 7. drive output high state voltage versus temperature figure 8. drive output high state voltage versus source current t a = 25 c v cc = 15 v v ih v il v ih v il - v il , input threshold voltage (v) v ih - v il , input threshold voltage (v) v ih v ol , output low state voltage (v) = 500 ma = 250 ma v cc = 15 v 3.0 2.8 2.6 2.4 2.2 2.0 -40 -20 0 20 40 60 80 100 120 140 2.7 2.6 2.5 2.4 2.3 2.2 13 14 15 16 17 18 19 20 2.0 1.5 1.0 0.5 -40 -20 0 20 40 60 80 100 120 140 0 1.6 1.2 0.8 0 0.2 0.4 0.6 0.8 1.0 -40 -20 0 20 40 60 80 100 120 140 13.9 13.8 13.7 13.6 13.5 14.6 14.2 13.8 13.0 0.1 0.2 0.3 0.4 0.5 0.4 13.4
mc33153 http://onsemi.com 5 v ssc , short circuit threshold voltage (mv) v soc , overcurrent threshold voltage (mv) 12 135 12 70 100 14 -60 135 -60 70 50 16 v cc , supply voltage (v) t a = 25 c v cc , supply voltage (v) t a = 25 c v pin 7 , fault output voltage (v) v pin 1 , current sense input voltage (mv) v ssc , short circuit threshold voltage (mv) t a , ambient temperature ( c) v cc = 15 v v soc , overcurrent threshold voltage (mv) t a , ambient temperature ( c) v cc = 15 v v o , drive output voltage (v) figure 9. drive output voltage versus current sense input voltage v pin 1 , current sense input voltage (mv) figure 10. fault output voltage versus current sense input voltage figure 11. overcurrent protection threshold voltage versus temperature figure 12. overcurrent protection threshold voltage versus supply voltage figure 13. short circuit comparator threshold voltage versus temperature figure 14. short circuit comparator threshold voltage versus supply voltage v cc = 15 v v pin 4 = 0 v v pin 8 > 7.0 v t a = 25 c v cc = 15 v v pin 4 = 0 v v pin 8 > 7.0 v t a = 25 c 14 12 10 8.0 6.0 4.0 2.0 0 55 60 65 70 75 80 12 10 8.0 6.0 4.0 2.0 0 110 120 130 140 150 16 0 68 66 64 62 60 -40 -20 0 20 40 60 80 100 120 140 68 66 64 62 60 14 16 18 20 130 125 -40 -20 0 20 40 60 80 100 120 140 14 16 18 20 130 125
mc33153 http://onsemi.com 6 , current source ( a) i chg m , current source ( a) v bdt , fault blanking/desaturation 5.0 -200 12 6.6 6.0 16 -60 -200 -60 6.6 0 0 v cc , supply voltage (v) v pin 4 = 0 v v pin 8 = 0 v t a = 25 c v cc , supply voltage (v) v pin 4 = 0 v v pin 1 > 100 mv t a = 25 c v o , drive output voltage (v) v pin 8 , fault blanking/desaturation input voltage (v) v cc = 15 v v pin 4 = 0 v v pin 1 > 100 mv t a = 25 c i chg m t a , ambient temperature ( c) v cc = 15 v v pin 8 = 0 v v bdt , fault blanking/desaturation t a , ambient temperature ( c) v cc = 15 v v pin 4 = 0 v v pin 1 > 100 mv i si , current sense input current ( a ) m figure 15. current sense input current versus voltage v pin 1 , current sense input voltage (v) figure 16. drive output voltage versus fault blanking/desaturation input voltage v cc = 15 v t a = 25 c figure 17. fault blanking/desaturation comparator threshold voltage versus temperature figure 18. fault blanking/desaturation comparator threshold voltage versus supply voltage figure 19. fault blanking/desaturation current source versus temperature figure 20. fault blanking/desaturation current source versus supply voltage threshold voltage (v) threshold voltage (v) 14 12 10 8.0 6.0 4.0 2.0 0 6.2 6.4 6.6 6.8 7.0 -0.5 -1.0 -1.5 4.0 6.0 8.0 10 12 14 16 2.0 6.5 6.4 -20 0 20 40 60 80 100 120 140 -40 6.5 6.4 14 16 18 20 -220 -240 -260 -280 -300 -20 0 20 40 60 80 100 120 140 -40 15 20 10 -220 -240 -260 -280 -300
mc33153 http://onsemi.com 7 , discharge current (ma) i dscg -60 12.5 0 14.0 0 2.5 10 16 0 1.0 0 -200 v th(uvlo) , undervoltage t a , ambient temperature ( c) startup threshold v cc increasing i source , output source current (ma) v cc = 15 v v pin 4 = 0 v v pin 1 = 1.0 v pin 8 = open t a = 25 c v pin 8 , fault blanking/desaturation input voltage (v) v o , drive output voltage (v) v cc , supply voltage (v) v pin 4 = 0 v t a = 25 c v pin 7 , fault output voltage (v) i sink , output sink current (ma) v cc = 15 v v pin 4 = 5.0 v t a = 25 c figure 21. fault blanking/desaturation current source versus input voltage v pin 8 , fault blanking/desaturation input voltage (v) figure 22. fault blanking/desaturation discharge current versus input voltage v cc = 15 v v pin 4 = 0 v t a = 25 c figure 23. fault output low state voltage versus sink current figure 24. fault output high state voltage versus source current figure 25. drive output voltage versus supply voltage figure 26. uvlo thresholds versus temperature , current source ( a) i chg m v cc = 15 v v pin 4 = 5.0 v t a = 25 c v pin 7 , fault output voltage (v) turn-off threshold startup threshold turn-off threshold v cc decreasing lockout threshold (v) 13.8 13.6 13.4 13.2 4.0 6.0 8.0 10 12 14 16 18 20 2.0 13.0 -220 -240 -260 -280 -300 4.0 6.0 8.0 10 12 14 16 2.0 4.0 8.0 12 16 2.0 1.5 1.0 0.5 0 -0.5 0.8 0.6 0.4 0.2 0 2.0 4.0 6.0 8.0 10 11 12 13 14 15 14 12 10 8.0 6.0 4.0 2.0 0 12.0 11.5 11.0 10.5 -20 20 60 100 140 -40 0 40 80 120
mc33153 http://onsemi.com 8 -60 10 1.0 80 5.0 10 t a , ambient temperature ( c) v cc = 15 v v pin 4 = v cc drive output open f, input frequency (khz) v cc = 15 v t a = 25 c i cc , supply current (ma) figure 27. supply current versus supply voltage v cc , supply voltage (v) figure 28. supply current versus temperature output high figure 29. supply current versus input frequency output low t a = 25 c i cc , supply current (ma) c l = 10 nf = 5.0 nf = 2.0 nf = 1.0 nf i cc , supply current (ma) 8.0 6.0 4.0 2.0 0 20 40 60 80 100 120 140 20 -20 0 -40 10 15 8.0 6.0 4.0 2.0 0 1000 10 100 60 40 20 0 operating description gate drive controlling switching times the most important design aspect of an igbt gate drive is optimization of the switching characteristics. the switching characteristics are especially important in motor control applications in which pwm transistors are used in a bridge configuration. in these applications, the gate drive circuit components should be selected to optimize turnon, turnoff and offstate impedance. a single resistor may be used to control both turnon and turnoff as shown in figure 30. however, the resistor value selected must be a compromise in turnon abruptness and turnoff losses. using a single resistor is normally suitable only for very low frequency pwm. an optimized gate drive output stage is shown in figure 31. this circuit allows turnon and turnoff to be optimized separately. the turnon resistor, r on , provides control over the igbt turnon speed. in motor control circuits, the resistor sets the turnon di/dt that controls how fast the freewheel diode is cleared. the interaction of the igbt and freewheeling diode determines the turnon dv/dt. excessive turnon dv/dt is a common problem in halfbridge circuits. the turnoff resistor, r off , controls the turnoff speed and ensures that the igbt remains off under commutation stresses. turnoff is critical to obtain low switching losses. while igbts exhibit a fixed minimum loss due to minority carrier recombination, a slow gate drive will dominate the turnoff losses. this is particularly true for fast igbts. it is also possible to turnoff an igbt too fast. excessive turnoff speed will result in large overshoot voltages. normally, the turnoff resistor is a small fraction of the turnon resistor. the mc33153 contains a bipolar totem pole output stage that is capable of sourcing 1.0 amp and sinking 2.0 amps peak. this output also contains a pull down resistor to ensure that the igbt is off whenever there is insufficient v cc to the mc33153. in a pwm inverter, igbts are used in a halfbridge configuration. thus, at least one device is always off. while
mc33153 http://onsemi.com 9 the igbt is in the offstate, it will be subjected to changes in voltage caused by the other devices. this is particularly a problem when the opposite transistor turns on. when the lower device is turned on, clearing the upper diode, the turnon dv/dt of the lower device appears across the collector emitter of the upper device. to eliminate shootthrough currents, it is necessary to provide a low sink impedance to the device that is in the offstate. in most applications the turnoff resistor can be made small enough to hold off the device that is under commutation without causing excessively fast turnoff speeds. figure 30. using a single gate resistor output v cc v ee 5 v ee v ee 3 r g igbt figure 31. using separate resistors for turnon and turnoff output v cc v ee 5 v ee v ee 3 r on igbt r off d off a negative bias voltage can be used to drive the igbt into the offstate. this is a practice carried over from bipolar darlington drives and is generally not required for igbts. however, a negative bias will reduce the possibility of shootthrough. the mc33153 has separate pins for v ee and kelvin ground. this permits operation using a +15/5.0 v supply. interfacing with optoisolators isolated input the mc33153 may be used with an optically isolated input. the optoisolator can be used to provide level shifting, and if desired, isolation from ac line voltages. an optoisolator with a very high dv/dt capability should be used, such as the hewlett packard hcpl4053. the igbt gate turnon resistor should be set large enough to ensure that the opto's dv/dt capability is not exceeded. like most optoisolators, the hcpl4053 has an active low opencollector output. thus, when the led is on, the output will be low. the mc33153 has an inverting input pin to interface directly with an optoisolator using a pull up resistor. the input may also be interfaced directly to 5.0 v cmos logic or a microcontroller. optoisolator output fault the mc33153 has an active high fault output. the fault output may be easily interfaced to an optoisolator. while it is important that all faults are properly reported, it is equally important that no false signals are propagated. again, a high dv/dt optoisolator should be used. the led drive provides a resistor programmable current of 10 to 20 ma when on, and provides a low impedance path when off. an active high output, resistor, and small signal diode provide an excellent led driver. this circuit is shown in figure 32. figure 32. output fault optoisolator short circuit latch output 7 v ee v cc v ee q undervoltage lockout it is desirable to protect an igbt from insufficient gate voltage. igbts require 15 v on the gate to achieve the rated onvoltage. at gate voltages below 13 v, the onvoltage increases dramatically, especially at higher currents. at very low gate voltages, below 10 v, the igbt may operate in the linear region and quickly overheat. many pwm motor drives use a bootstrap supply for the upper gate drive. the uvlo provides protection for the igbt in case the bootstrap capacitor discharges. the mc33153 will typically start up at about 12 v. the uvlo circuit has about 1.0 v of hysteresis and will disable the output if the supply voltage falls below about 11 v. protection circuitry desaturation protection bipolar power circuits have commonly used what is known as adesaturation detectiono. this involves monitoring the collector voltage and turning off the device if this voltage rises above a certain limit. a bipolar transistor will only conduct a certain amount of current for a given base drive. when the base is overdriven, the device is in
mc33153 http://onsemi.com 10 saturation. when the collector current rises above the knee, the device pulls out of saturation. the maximum current the device will conduct in the linear region is a function of the base current and the dc current gain (h fe ) of the transistor. the output characteristics of an igbt are similar to a bipolar device. however, the output current is a function of gate voltage instead of current. the maximum current depends on the gate voltage and the device type. igbts tend to have a very high transconductance and a much higher current density under a short circuit than a bipolar device. motor control igbts are designed for a lower current density under shorted conditions and a longer short circuit survival time. the best method for detecting desaturation is the use of a high voltage clamp diode and a comparator. the mc33153 has a fault blanking/desaturation comparator which senses the collector voltage and provides an output indicating when the device is not fully saturated. diode d1 is an external high voltage diode with a rated voltage comparable to the power device. when the igbt is aono and saturated, d1 will pull down the voltage on the fault blanking/desaturation input. when the igbt pulls out of saturation or is aoffo, the current source w ill pull up the input and trip the comparator. the comparator threshold is 6.5 v, allowing a maximum onvoltage of about 5.8 v. a fault exists when the gate input is high and v ce is greater than the maximum allowable v ce(sat) . the output of the desaturation comparator is anded with the gate input signal and fed into the short circuit and overcurrent latches. the overcurrent latch will turnoff the igbt for the remainder of the cycle when a fault is detected. when input goes high, both latches are reset. the reference voltage is tied to the kelvin ground instead of the v ee to make the threshold independent of negative gate bias. note that for proper operation of the desaturation comparator and the fault output, the current sense input must be biased above the overcurrent and short circuit comparator thresholds. this can be accomplished by connecting pin 1 to v cc . figure 33. desaturation detection v cc v ee v cc 8 270 m a v ref 6.5 v desaturation comparator kelvin gnd d1 the mc33153 also features a programmable fault blanking time. during turnon, the igbt must clear the opposing freewheeling diode. the collector voltage will remain high until the diode is cleared. once the diode has been cleared, the voltage will come down quickly to the v ce(sat) of the device. following turnon, there is normally considerable ringing on the collector due to the c oss capacitance of the igbts and the parasitic wiring inductance. the fault signal from the desaturation comparator must be blanked sufficiently to allow the diode to be cleared and the ringing to settle out. the blanking function uses an npn transistor to clamp the comparator input when the gate input is low. when the input is switched high, the clamp transistor will turn aoffo, allowing the internal current source to charge the blanking capacitor. the time required for the blanking capacitor to charge up from the onvoltage of the internal npn transistor to the trip voltage of the comparator is the blanking time. if a short circuit occurs after the igbt is turned on and saturated, the delay time will be the time required for the current source to charge up the blanking capacitor from the v ce(sat) level of the igbt to the trip voltage of the comparator. fault blanking can be disabled by leaving pin 8 unconnected. sense igbt protection another approach to protecting the igbts is to sense the emitter current using a current shunt or sense igbts. this method has the advantage of being able to use high gain igbts which do not have any inherent short circuit capability. current sense igbts work as well as current sense mosfets in most circumstances. however, the basic problem of wo rking with very low sense voltages still exists. sense igbts sense current through the channel and are therefore linear with respect to the collector current. because igbts have a very low incremental onresistance, sense igbts behave much like lowon resistance current sense mosfets. the output voltage of a properly terminated sense igbt is very low, normally less than 100 mv. the sense igbt approach requires fault blanking to prevent false tripping during turnon. the sense igbt also requires that the sense signal is ignored while the gate is low. this is because the mirror output normally produces large transient voltages during both turnon and turnoff due to the collector to mirror capacitance. with nonsensing types of igbts, a low resistance current shunt (5.0 to 50 m w ) can be used to sense the emitter current. when the output is an actual short circuit, the inductance will be very low. since the blanking circuit provides a fixed minimum ontime, the peak current under a short circuit can be very high. a short circuit discern function is implemented by the second comparator which has a higher trip voltage. the short circuit signal is latched and appears at the fault output. when a short circuit is detected, the igbt should be turnedoff for several milliseconds allowing it to cool down before it is turned back on. the sense circuit is very similar to the desaturation circuit. it is possible to build a combination circuit that provides protection for both short circuit capable igbts and sense igbts.
mc33153 http://onsemi.com 11 application information figure 34 shows a basic igbt driver application. when driven from an optoisolator, an input pull up resistor is required. this resistor value should be set to bias the output transistor at the desired current. a decoupling capacitor should be placed close to the ic to minimize switching noise. a bootstrap diode may be used for a floating supply. if the protection features are not required, then both the fault blanking/desaturation and current sense inputs should both be c onnected to the kelvin ground (pin 2). when used with a single supply, the kelvin ground and v ee pins should be connected together. separate gate resistors are recommended to optimize the turnon and turnoff drive. figure 34. basic application 7 4 3 2 1 5 8 6 fault input desat/ blank output sense gnd v ee v cc mc33153 18 v b+ bootstrap figure 35. dual supply application 7 4 3 2 1 5 8 6 fault input desat/ blank output sense gnd v ee v cc mc33153 15 v -5.0 v when used in a dual supply application as in figure 35, the kelvin ground should be connected to the emitter of the igbt. if the protection features are not used, then both the fault blanking/desaturation and the current sense inputs should be connected to ground. the input optoisolator should always be referenced to v ee . if desaturation protection is desired, a high voltage diode is connected to the fault blanking/desaturation pin. the blanking capacitor should be connected from the desaturation pin to the v ee pin. if a dual supply is used, the blanking capacitor should be connected to the kelvin ground. the current sense input should be tied high because the two comparator outputs are anded together. although the reverse voltage on collector of the igbt is clamped to the emitter by the freewheeling diode, there is normally considerable inductance within the package itself. a small resistor in series with the diode can be used to protect the ic from reverse voltage transients. figure 36. desaturation application 7 4 3 2 1 5 8 6 fault input desat/ blank output sense gnd v ee v cc mc33153 18 v c blank when using sense igbts or a sense resistor, the sense voltage is applied to the current sense input. the sense trip voltages are referenced to the kelvin ground pin. the sense voltage is very small, typically about 65 mv, and sensitive to noise. therefore, the sense and ground return conductors should be routed as a differential pair. an rc filter is useful in filtering any high frequency noise. a blanking capacitor is connected from the blanking pin to v ee . the stray capacitance on the blanking pin provides a very small level of blanking if left open. the blanking pin should not be grounded when using current sensing, that would disable the sense. the blanking pin should never be tied high, that would short out the clamp transistor. figure 37. sense igbt application 7 4 3 2 1 5 8 6 fault input desat/ blank output sense gnd v ee v cc mc33153 18 v
mc33153 http://onsemi.com 12 package dimensions p suffix plastic package case 62605 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040
mc33153 http://onsemi.com 13 package dimensions d suffix plastic package case 75107 (so8) issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
mc33153 http://onsemi.com 14 notes
mc33153 http://onsemi.com 15 notes
mc33153 http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc33153/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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